ISL29012IROZ-EVALZ【PDF 7/15 页】EVALUATION BOARD ISL29012IROZ

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ISL29003

The transfer function effectively for each timing mode

becomes:

TABLE 12. RESOLUTION AND INTEGRATION TIME

SELECTION

Range ( k ) × ------------------

R EXT

E = ---------------------------------------------------- × DATA

2

INTERNAL TIMING MODE

100k Ω

n

(EQ. 4)

n

15

RANGE1

f OSC = 327kHz

t INT RESOLUTION

(ms) LUX/COUNT

200 0.06

RANGE4

f OSC = 655kHz

t INT RESOLUTION

(ms) (LUX/COUNT)

100 2

Range ( k ) × ------------------

R EXT

E = ---------------------------------------------------- × DATA

EXTERNAL TIMING MODE

100k Ω

COUNTER

(EQ. 5)

11

7

3

12.8

0.8

0.05

1.0

15.6

250

6.4

0.4

0.025

62.5

1,000

16,000

f OSC 1 = --- × ------------------ × 684 kHz

R EXT

f OSC 2 = ------------------ × 684 kHz

f OSC 1 = --- ( f OSC 2 )

n = 3, 7, 11, or 15. This is the number of clock cycles

programmed in the command register.

Range(k) is the user defined range in the Gain/Range bit

in the command register.

R EXT is an external scaling resistor hardwired to the R EXT

pin.

DATA is the output sensor reading in number of counts

available at the data register.

2 n represents the maximum number of counts possible in

Internal Timing Mode. For the External Timing Mode the

maximum number of counts is stored in the data register

named COUNTER.

COUNTER is the number increments accrued for between

integration time for External Timing Mode.

Gain/Range, Range(k)

The Gain/Range can be programmed in the control register

to give Range(k) determining the FSR. Note that Range(k) is

not the FSR (see Equation 3). Range(k) provides four

constants depending on programmed k that will be scaled by

R EXT (see Table 9). Unlike R EXT , Range(k) dynamically

adjusts the FSR. This function is especially useful when light

conditions are varying drastically while maintaining excellent

resolution.

Number of Clock Cycles, n-bit ADC

The number of clock cycles determines “n” in the n-bit ADC; 2 n

clock cycles is a n-bit ADC. n is programmable in the command

register in the width function. Depending on the application, a

good balance of speed, and resolution has to be considered

when deciding for n. For fast and quick measurement, choose

the smallest n = 3. For maximum resolution without regard of

time, choose n = 15. Table 12 compares the trade-off between

integration time and resolution. See Equations 10 and 11 for the

relation between integration time and n. See Equation 3 for the

relation of n and resolution.

7

R EXT = 100k Ω

External Scaling Resistor R EXT and f OSC

The ISL29012 uses an external resistor R EXT to fix its

internal oscillator frequency, f OSC . Consequently, R EXT

determines the f OSC , integration time and the FSR of the

device. f OSC , a dual speed mode oscillator, is inversely

proportional to R EXT . For user simplicity, the proportionality

constant is referenced to fixed constants 100k Ω and 655kHz

in Equations 6 and 7:

1 100k Ω (EQ. 6)

2

100k Ω (EQ. 7)

R EXT

f OSC 1 is oscillator frequency when Range1 or Range2 are

set. This is nominally 342kHz when R EXT is 100k Ω .

f OSC 2 is the oscillator frequency when Range3 or Range4

are set. This is nominally 684kHz when R EXT is 100k Ω .

When the Range/Gain bits are set to Range1 or Range2,

f OSC runs at half speed compared to when Range/Gain bits

are set to Range3 and Range4 by using Equation 8:

1 (EQ. 8)

2

The automatic f OSC adjustment feature allows significant

improvement of signal-to-noise ratio when detecting very low

lux signals.

Integration Time or Conversion Time

Integration time is the period during which the device’s

analog-to-digital ADC converter samples the photodiode

current signal for a lux measurement. Integration time, in

other words, is the time to complete the conversion of analog

photodiode current into a digital signal--number of counts.

Integration time affects the measurement resolution. For

better resolution, use a longer integration time. For short and

fast conversions, use a shorter integration time.

The ISL29012 offers user flexibility in the integration time to

balance resolution, speed and noise rejection. Integration time

can be set internally or externally and can be programmed in

the command register 00(hex) Bit 5.

FN6476.2

November 17, 2011

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